In a sub-sampling PLL which has been attracting attention in recent years, phase comparison is performed by sampling the output signal of a voltage-controlled oscillator (VCO) directly with a reference signal. The sub-sampling PLL has an advantage that an extremely high loop gain can be obtained without a dead zone caused in a normal phase comparator.
However, the phase synchronization in the above sub-sampling PLL can be performed only based on a dividing ratio of an integer, and cannot be performed based on a dividing ratio of a decimal fraction.